This invention relates generally to semiconductor wafer manufacture, and more particularly to methods for providing an electrical contact from one surface of a silicon wafer to the opposite surface, more particularly to methods for filling a through-via in a silicon wafer with a conductive material.
A method is needed to make the most direct electrical connection from an interconnect""s contact tip to the substrate upon which the interconnect is mounted. Currently, electrical continuity from an interconnect contact tip to the mounting substrate is by use of thin film aluminized traces that are wire bonded to the substrate. However, inductance, capacitance, and resistance increase with trace length and can degrade the electrical performance of the interconnect. Additionally, wire bond loop height must be kept at very low profile above the interconnect chip to prevent the wire bonds from touching the device under test.
A more direct and robust electrical contact from the interconnect contact tip to the mounting substrate would be to form a via in the vicinity of the interconnect contact tip through the full thickness of the wafer to the underside of the wafer. However, due to the thickness of the wafer, and/or the high aspect ratio of the via, conventional plating of the sides of such a xe2x80x9cthrough-viaxe2x80x9d with metal is not practical, requiring other means of filling the via. A hallmark of this invention is to provide a process for filling a through-via that is formed through the thickness of a wafer with a conductive material.
The invention disclosed is a process for filling a through-via that is formed through the full thickness of a semiconductor wafer. In one embodiment, the process comprises the steps of: (i) providing a silicon wafer with at least one through-via formed through the thickness of the wafer; (ii) mounting the silicon wafer to a mounting substrate; (iii) positioning a solder jet nozzle in line with the through-via; and (iv) extruding a liquid conductive material through the solderjet nozzle such that the conductive material fills the through-via to form a conductive via.
In another embodiment, the process comprises the steps of: (i) providing a silicon wafer with at least one through-via; (ii) mounting the silicon wafer onto a surface of a mounting substrate, the mounting substrate surface having at least one cavity, wherein the silicon wafer is positioned with the through-via located in line with the cavity; (iii) positioning a solder jet nozzle in line with the through-via; and (iv) extruding a liquid conductive material through the solder jet nozzle such that the conductive material fills the through-via and the cavity in the mounting substrate to form a conductive via.
A further embodiment of the invention is a process comprising the steps of: (i) providing a silicon wafer with at least one through-via; (ii) mounting the silicon wafer onto a surface of a mounting substrate wherein the mounting substrate comprises a circuit substrate, the mounting substrate surface having at least one interconnect, wherein the silicon wafer is positioned such that the through-via is located in line with the interconnect; (iii) positioning a solder jet nozzle in line with the through-via; and (iv) extruding a liquid conductive material through the solder jet nozzle such that the conductive material fills the through-via in electrical contact with the interconnect.
Another embodiment of the invention is a process comprising the steps of: (i) providing a silicon wafer with at least one through-via; (ii) mounting the silicon wafer to a mounting substrate; (iii) providing a one or more conductive material balls; (iv) depositing the one or more conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and (v) reflowing the conductive material in the through-via to form a conductive via.